INTERNSHIP DETAILS

Mixed Signal Design Engineer (RDSS Intern)

CompanyNVIDIA
LocationTaipei
Work ModeOn Site
PostedJanuary 9, 2026
Internship Information
Core Responsibilities
The intern will be involved in mixed-signal and analog circuit design for high-speed memory I/O interfaces and will solve challenges related to circuit designs in deep submicron CMOS FinFET processes. They will also work with multi-functional teams to optimize designs and take them through productization.
Internship Type
full time
Company Size
43288
Visa Sponsorship
No
Language
English
Working Hours
40 hours
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About The Company
Since its founding in 1993, NVIDIA (NASDAQ: NVDA) has been a pioneer in accelerated computing. The company’s invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined computer graphics, ignited the era of modern AI and is fueling the creation of the metaverse. NVIDIA is now a full-stack computing company with data-center-scale offerings that are reshaping industry.
About the Role

By submitting your resume, you’re expressing interest in our 2026 RDSS (Research and Development Substitute Services) program. Please confirm your eligibility with the local district office before applying the role.

We are looking for a Mixed-Signal/Analog/IO Circuit Design Engineer (RDSS Intern) – someone who is excited to join a growing group of diverse individuals responsible for handling challenge high-speed memory interface designs.

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can pursue, and that matter to the world. This is our life’s work, to amplify human creativity and intelligence.

What you'll be doing:

  • Mixed-Signal/Analog circuit design for High Speed Memory I/O Interfaces

  • Solve challenge of circuit designs in deep submicron CMOS FinFET processes

  • Take designs through productization and be involved in all stages of development

  • Work with multi-functional teams to optimize the designs

What we need to see:

  • MSEE or equivalent experience.

  • A teammate with good interpersonal skills

  • System level timing budgets, specs and analysis

  • In-depth understanding of deep submicron CMOS FinFET process and circuit design issues

  • Familiarity with device reliability, ESD and Latch-Up requirements

  • Supervise layout development and understand all ESD/Latch-Up, reliability rules

  • Broad circuit design and implementation knowledge with significant depth

  • Working Knowledge of package substrate, board design and power delivery is a plus.

  • Background with Cadence custom design tools, various circuit simulators like Hspice, XA, FineSim, Spectre

  • Working knowledge of Verilog, Nanotime, Matlab is plus along with hands on with Lab test and measurement equipment is a plus

We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status. We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.

Key Skills
Mixed-Signal DesignAnalog Circuit DesignHigh Speed Memory I/O InterfacesDeep Submicron CMOSFinFET ProcessesInterpersonal SkillsDevice ReliabilityESD RequirementsLatch-Up RequirementsLayout DevelopmentCircuit DesignCadence ToolsCircuit SimulatorsVerilogMatlabLab Test Equipment
Categories
EngineeringTechnology