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INTERNSHIP DETAILS

Intern, Analog Design Engineer

CompanySamsung Semiconductor

LocationSan Jose

Work ModeOn Site

PostedJanuary 23, 2026

Internship Information

Core Responsibilities

The intern will build a state-of-the-art clock distribution network for 224Gbps Serdes, design schematics, lead layout, and collaborate with expert circuit design engineers. Additional responsibilities will be assigned as needed.

Internship Type

full time

Salary Range

$28 - $62

Company Size

9950

Visa Sponsorship

Language

English

Working Hours

40 hours

Apply Now →

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About The Company

Established in 1974 as a subsidiary of Samsung Electronics, we’re proud to be recognized as one of the leading chip manufacturers in the world. Using our knowledge in semiconductor technology, our ambition is to spark the imagination of device manufacturers with top-of-the-line building blocks and, through that, enrich the lives of people around the world with transformative solutions.

About the Role

<div class="content-intro">Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period.  Advancing the World’s Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you’ll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what’s possible and powering the future.  We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We’re dedicated to empowering people to be their true selves. Together, we’re building a better tomorrow for our employees, customers, partners, and communities.</div>What You’ll Learn <ul> <li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;">Project Overview: 224Gbps Serdes Clock Distribution</li> <li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;">Skills You’ll Learn: <ul> <li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;">Simulation Methodology</li> <li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;">Circuit Design Techniques for high-speed circuit</li> <li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;">Layout Techniques for nm technology</li> </ul> </li> </ul> What You’ll Do Our High-Speed IO team is responsible for developing and delivering high‑speed I/O intellectual property (IP) blocks that are fully qualified for Samsung’s advanced semiconductor processes. This internship offers broad exposure to circuit design, verification, and integration across a portfolio that spans from low‑power to high‑performance solutions for diverse market segments. Location: Daily onsite presence at our San Jose headquarters in alignment with our Flexible Work policy Reports to: Sr. Principal Engineer <ul> <li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;">Build a state-of-the-art clock distribution network for 224Gbps Serdes</li> <li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;">Design schematics</li> <li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;">Lead layout</li> <li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;">Collaborate with expert circuit design engineers</li> <li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;">Complete other responsibilities as assigned</li> </ul> What You Bring <ul> <li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;">Pursing PhD in Electrical Engineering and has a completed a Master's Degree</li> <li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;">Must have at least 1 academic quarter/semester remaining</li> <li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;">Understanding of Fundamental Analog, Mixed Signal circuits and theory / Signal processing and Communication System Analysis </li> <li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;">Familiar with Cadence environment, MATLAB, Python, Verilog, System-Verilog</li> <li>You’re inclusive, adapting your style to the situation and diverse global norms of our people.</li> <li>An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.</li> <li>You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.</li> <li>Innovative and creative, you proactively explore new ideas and adapt quickly to change.</li> </ul><div class="content-pay-transparency"><div class="pay-input"><div class="description">What We Offer The pay range below is for all roles at this level across all US locations and functions. Individual pay rates depend on a number of factors—including the role’s function and location, as well as the individual’s knowledge, skills, experience, education, and training.  This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to the usual Medical/Dental/Vision, our inclusive rewards plan empowers our people to care for their whole selves. An investment in your future is an investment in ours. Relocation Support Live 50+ miles away from your new office? No worries! We'll provide a stipend to help support your move. Housing Stipend Signing a lease on a new place for your summer internship? We'll help you pay your way with a monthly stipend. Give Back With a charitable giving match and frequent opportunities to get involved, we take an active role in supporting the community. Prioritize Emotional Wellness With on-demand apps and paid therapy sessions, you’ll have support no matter where you are. Stay Fit Eating well and being active are important parts of a healthy life. Our onsite Café and gym, plus virtual classes, make it easier. Embrace Flexibility Benefits are best when you have the space to use them. That’s why we facilitate a flexible environment so you can find the right balance for you.</div><div class="title">Hourly Base Pay Rate</div><div class="pay-range">$28—$62 USD</div></div></div><div class="content-conclusion">Equal Opportunity Employment Policy  Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. When selecting team members, we prioritize talent and qualities such as humility, kindness, and dedication. We extend comprehensive accommodations throughout our recruiting processes for candidates with disabilities, long-term conditions, neurodivergent individuals, or those requiring pregnancy-related support. All candidates scheduled for an interview will receive guidance on requesting accommodations. Recruiting Agency Policy We do not accept unsolicited resumes. Only authorized recruitment agencies that have a current and valid agreement with Samsung Semiconductor, Inc. are permitted to submit resumes for any job openings. Applicant AI Use Policy  At Samsung Semiconductor, we support innovation and technology. However, to ensure a fair and authentic assessment, we prohibit the use of generative AI tools to misrepresent a candidate's true skills and qualifications. Permitted uses are limited to basic preparation, grammar, and research, but all submitted content and interview responses must reflect the candidate’s genuine abilities and experience. Violation of this policy may result in immediate disqualification from the hiring process.   Applicant Privacy Policy https://semiconductor.samsung.com/about-us/careers/us/privacy/  </div>

Key Skills

Analog CircuitsMixed Signal CircuitsSignal ProcessingCommunication System AnalysisCadenceMATLABPythonVerilogSystem-VerilogCircuit DesignSimulation MethodologyLayout TechniquesHigh-Speed Circuit DesignCollaborationInnovationCuriosityResilience