Memory Architecture Intern

<div class="content-intro"><p>Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.</p></div><p>We are seeking an innovative Memory Architecture Intern to join our architecture team and drive innovation in memory-subsystems, with senior architects, for AI accelerators and RISC-V CPUs, leveraging our state-of-the-art chiplet architecture. This role is a minimum term of 6 months.</p> <p>This role is hybrid or remote, based out of South Korea or North America.</p> <p>&nbsp;</p> <p><strong>Who You Are</strong></p> <ul> <li>Currently pursuing a Ph.D. in Computer Engineering, Electrical Engineering, or a related field (Ph.D candidate with a publication track record is a strong plus).</li> <li>Strong foundation in computer architecture, specifically the memory subsystem, on/off-chip interconnection networks, and data movement optimization.</li> <li>Hands-on experience with performance modeling and simulation tools such as gem5, DRAMSim, Ramulator, Booksim, or SystemC/TLM.</li> <li>Familiarity with chiplet technology, advanced packaging, and concepts like in-memory/near-memory computing.</li> </ul> <p>&nbsp;</p> <p><strong>What We Need</strong></p> <ul> <li>Analyze and project the system balance (compute/memory/network ratio) for our next-generation AI computer.</li> <li>Characterize memory-intensive AI workloads and model data movement within our Galaxy scale-out architecture.</li> <li>Develop a performance model for the memory chiplet and conduct thorough performance bottleneck analysis.</li> <li>Investigate and model the feasibility and trade-offs of advanced memory architectures, including disaggregated memory and reliability/security, utilizing the Tenstorrent chiplet family ecosystem.</li> </ul> <p>&nbsp;</p> <p><strong>What You Will Learn</strong></p> <ul> <li>Gain deep exposure to our cutting-edge chiplet product family and overall system architecture, seeing the real-world path from architecture exploration up to packaging and system composition.</li> <li>Become proficient in the performance bottleneck analysis methodology for high-performance memory subsystems.</li> <li>Directly contribute to shaping the architectural roadmap for our next-generation AI computers.</li> <li>Develop expert knowledge of advanced architectural concepts, including memory-side DMA programming.</li> </ul> <div> <p>&nbsp;</p> <em>Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.</em></div><div class="content-conclusion"><p><em>This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.</em></p></div>