INTERNSHIP DETAILS

Front End Design Engineer Intern (Summer 2026)

CompanyCadence Design Systems
LocationAustin
Work ModeOn Site
PostedMarch 13, 2026
Internship Information
Core Responsibilities
The intern will perform as a member of the Logic Design Team for Xtensa processors within the Cadence Tensilica CPU Processor Team. This role involves contributing to the development of industry-leading processor cores and DSPs used in intelligent IoT and ML/AI applications.
Internship Type
full time
Company Size
10832
Visa Sponsorship
No
Language
English
Working Hours
40 hours
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About The Company
Cadence is a market leader in AI and digital twins, pioneering the application of computational software to accelerate innovation in the engineering design of silicon to systems. Our design solutions, based on Cadence’s Intelligent System Design™ strategy, are essential for the world’s leading semiconductor and systems companies to build their next-generation products from chips to full electromechanical systems that serve a wide range of markets, including hyperscale computing, mobile communications, automotive, aerospace, industrial, life sciences and robotics. In 2024, Cadence was recognized by the Wall Street Journal as one of the world’s top 100 best-managed companies. Cadence solutions offer limitless opportunities—learn more at www.cadence.com.
About the Role

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Front End Design Engineering Intern

The Cadence Tensilica CPU Processor Team is seeing rapid adoption of our industry leading processor cores and DSP's. Our configurable and extensible processor cores are poised to meet the demands of intelligent IoT Devices at the edge of ML/AI Applications. We are already empowering many of the top chip and system companies with our Audio, Speech, AR/VR, ADAS, Vision and Imaging applications being driven with our processor cores. Today Cadence is shipping an astounding 8 Billion processor cores annually and expanding into intelligent system design and development.

Cadence Tensilica CPU Processor Team is hiring students to join our R&D teams in San Jose and Austin. This is an amazing opportunity to work as a an engineering intern at a world leader in computational software, semiconductor design IP, and system verification hardware.  Our customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to complete systems for the most dynamic market applications including hyperscale computing, 5G communications, automotive, mobile, aerospace, consumer, industrial, and healthcare.

Come be part of this great Processor team where you can make an impact that is visible.  

Perform as a member of the Logic Design Team for Xtensa processors.


Position Requirements:

  • Currently enrolled in MS/BS major as Electrical Engineering, Computer Engineering, or equivalent.

  • Good knowledge of computer architecture and pipelined designs is required.  Understanding of compilers and operating systems is a plus.

  • Excellent knowledge of Verilog/SystemVerilog and popular EDA simulation & implementation tools.

  • Deep understanding of Digital Design and/or Design Verification Fundamentals.

  • Good experience in scripting languages. Excellent knowledge of Perl is a plus.

  • Excellent oral and written communications skills.

We’re doing work that matters. Help us solve what others can’t.

Key Skills
VerilogSystemVerilogDigital DesignDesign VerificationScripting LanguagesPerlComputer ArchitecturePipelined Designs
Categories
EngineeringSoftwareTechnologyScience & Research