INTERNSHIP DETAILS

FPGA Development Tools Engineer - Intern

CompanyAltera
LocationSan Jose
Work ModeOn Site
PostedMay 1, 2026
Internship Information
Core Responsibilities
You will research, design, and optimize software for the Quartus compiler to improve FPGA device performance and routing. Responsibilities include developing support for next-generation devices, managing compiler modules, and implementing new features while troubleshooting existing code.
Internship Type
full time
Salary Range
$105,000 - $110,000
Company Size
1
Visa Sponsorship
No
Language
English
Working Hours
40 hours
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About The Company
Welcome to Altera, where digital transformation is at the heart of everything we do. We are a forward-thinking IT development company dedicated to helping businesses navigate and thrive in the digital age. Specializing in creating innovative solutions that drive efficiency, growth, and competitive advantage, we are your trusted partner in the journey toward digital excellence. At Altera, we understand that the digital landscape is constantly evolving, and so are the needs of your business. Our team of expert developers, designers, and strategists works closely with you to craft tailored solutions that align with your vision and goals. From custom software development to cutting-edge web and mobile applications, we empower your business with the tools and technologies needed to stay ahead in a rapidly changing world. Our approach is centered on collaboration and innovation. We take the time to understand your unique challenges and opportunities, delivering solutions that not only meet but exceed your expectations. With Altera, digital transformation is more than just a buzzword—it's a pathway to unlocking new possibilities and achieving sustainable success.
About the Role

Job Details:

Job Description:

We are looking for a passionate and energetic Software Engineer-Intern to join our team at Altera®.  Altera is the pioneer of programmable logic solutions, enabling system and semiconductor companies to rapidly and cost effectively innovate, differentiate and win in their markets.  Altera combines the programmable logic technology with software tools, intellectual property, and customer support to provide high-value programmable solutions to many customers worldwide. 

In this role, you will be researching/designing/developing/optimizing software for Quartus, the compiler that programs all current/next generation of Field Programmable Gate Array (FPGA) devices. 

  • Quartus is used by all FPGA acceleration technologies (including High Level Synthesis, FPGA AI Suite, DSP Builder, etc) 

  • At the heart of Quartus is our Place and Route engine which is responsible for transforming HDL to bits such that a user's design is optimized for area and Fmax 

  • Cross-functional interactions with various customers (internal and external) 

  • Best of both worlds, hardware and software: 

    • Customer's hardware requirements: Fmax, throughput, timing closure and area 

    • Compiler SW optimizations: runtime and memory, including abstractions and frameworks for acceleration with the FPGA for domains such as deep learning, DSP algorithms, or data analytics 

As part of the Quartus team, your responsibilities will include, but are not limited to: 

  • Developing software support for successful routing of the latest next generation FPGA devices 

  • Owning various modules of the compiler from device modeling to timing closure to runtime 

  • Implementing new features in addition to root-causing and fixing the existing ones, while maneuvering your way through a big code base 

The pay range below is for Bay Area California only. Actual salary may vary based on a number of factors including job location, job-related knowledge, skills, experiences, trainings, etc. We also offer incentive opportunities that reward employees based on individual and company performance.  

 

$105K - $110K USD 

 

We use artificial intelligence to screen, assess, or select applicants for the position. Applicants must be eligible for any required U.S. export authorizations. 

Qualifications:

Minimum Qualifications

The candidate must be currently pursuing a PhD in Electrical & Computer Engineering and experience in:

  • Developing software support for successful routing of the latest next generation FPGA devices 

  • Device modeling, timing closure and runtime 

  • Implementing new features in addition to root-causing and fixing the existing ones

Job Type:

Student / Intern (Fixed Term)

Shift:

Shift 1 (United States of America)

Primary Location:

San Jose, California, United States

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Key Skills
FPGASoftware EngineeringQuartusHDLPlace and RouteTiming ClosureDevice ModelingC++AlgorithmsDeep LearningDSPData AnalyticsCompiler OptimizationSystem Design
Categories
TechnologySoftwareEngineeringScience & Research