INTERNSHIP DETAILS

TOP Design Verification Engineer Intern

CompanySK hynix memory solutions America Inc.
LocationSan Jose
Work ModeOn Site
PostedSeptember 3, 2026
Internship Information
Core Responsibilities
The intern will study SOC microarchitecture, modify test benches, and create test cases to verify functionality. They will also debug issues, file bug reports, and ensure testing meets functional and toggle coverage criteria.
Internship Type
full time
Salary Range
$35 - $45
Company Size
312
Visa Sponsorship
No
Language
English
Working Hours
40 hours
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About The Company
SK hynix memory solutions America Inc. (SKHMS America) was formed in August 2012 as a result of the acquisition of Link_A_Media Devices Corporation (LAMD) by SK hynix. **About SK hynix** SK hynix will present a valuable future to stakeholders, including customers, partners, investors, communities, members, and so on through Global Tech Leadership, thereby enriching and further developing the global ICT industry. We are also sharing our expertise and experience in the semiconductor field gained from the establishment of our “We Do Tech Center” along with investments in technical cooperation for our partners, thereby striving to boost the semiconductor ecosystem. **About SKHMS America** The integration of the controller solution know-how of SKHMS combined with the Advanced Non-volatile memories, DRAM technologies and the manufacturing capabilities of SK hynix produces leading-edge products across multiple market segments. Full vertical integration of controller hardware, advanced flash memory systems architecture, firmware, DRAM, NAND and other forms of non-volatile memory coupled with high volume memory manufacturing capability is quite rare in the industry. This allows our customers to have a one-stop storage solution provider with the capacity, support and expertise the industry demands. The combined focus of SK hynix and SKHMS provides excellent opportunity to become a market leader in Enterprise, Client and Mobile storage. Some notable company achievements: -SK hynix 1st with LDPC error correction solution -Delivered high performing competitive PCIe/SATA Controller for enterprise/client SSD with 2D/3D/4D NAND - SATA – SE3010/SE4011 - PCIe – PE4010/PE6000 series/PE8000 series -Developed highest performance eMMC Controller and delivered highest performance MPHY IP for UFS Controller for smartphones and tablets
About the Role

About the Company:

At SK Hynix Memory Solution, we're at the forefront of semiconductor innovation, developing advanced memory solutions that power everything from smartphones to data centers. As a global leader in DRAM and NAND flash technologies, we drive the evolution of advancing mobile technology, empowering cloud computing, and pioneering future technologies. Our cutting-edge memory technologies are essential in today's most advanced electronic devices and IT infrastructure, enabling enhanced performance and user experiences across the digital landscape.

We're looking for innovative minds to join our mission of shaping the future of technology. At SK Hynix Memory, you'll be part of a team that's pioneering breakthrough memory solutions while maintaining a strong commitment to sustainability. We're not just adapting to technological change – we're driving it, with significant investments in artificial intelligence, machine learning, and eco-friendly solutions and operational practices. As we continue to expand our market presence and push the boundaries of what's possible in semiconductor technology, we invite you to be part of our journey to creating the next generation of memory solutions that will define the future of computing.

 

Internship Duration: 6 months

Hours: 40 hours per week

Start Date: Immediately (September 2026 /October 2026) 

Location: San Jose

 

Responsibility :

  • Study the Microarchitecture of the Design (SOC TOP) and list the Verification Requirements
  • for testing.
  • Modify the Test Bench for the SOC TOP level testing.
  • Create/Modify Tests Cases to test the functionalities of the SOC.
  • Debug & identify the issue & file bug reports to Designer.
  • Testing to meet the Coverages (Functional, Toggle) criteria.

 

Minimum requirements :

  • A Bachelor’s or Master’s degree in Electrical Engineering (BSEE/MSEE) or a related field is required.
  • Digital IC Design & Verification experiences.
  • Work in Windows and Linux environment.
  • Python or Perl scripting experience.
  • Experience in System Verilog, UVM, C/Assembly coding
  • Experience in Perforce and Confluence.
  • Familiarity with UCIe, CPU architecture, NAND protocols, and AI productivity tools is a plus.

 

COMPENSATION: $35/hr - $45/hr

 

Key Skills
Digital IC DesignVerificationSystem VerilogUVMCAssemblyPythonPerlPerforceConfluenceMicroarchitectureSOCTest BenchDebuggingUCIeNAND Protocols
Categories
TechnologyEngineeringSoftware