INTERNSHIP DETAILS

Analog Layout Intern

CompanyMarvell Technology
LocationBengaluru
Work ModeOn Site
PostedSeptember 24, 2026
Internship Information
Core Responsibilities
The intern will be responsible for layout development and delivery of foundational IP and analog layouts for SOCs and test chips. They will also learn to use various IC layout development CAD and physical verification tools while collaborating with the engineering team.
Internship Type
full time
Company Size
10916
Visa Sponsorship
No
Language
English
Working Hours
40 hours
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About The Company
We believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology. At Marvell, we go all in with you. Focused and determined, we unite behind your goals as our own. We leverage our unrivaled portfolio of infrastructure technology to identify the best solution for your unique needs. And we sit shoulder-to-shoulder with your teams to build it. Agile in our thinking, and our partnerships, we look for unexpected connections that deliver a competitive edge and reveal new opportunities. At Marvell, we’re driven by the belief that how we do things matters just as much as what we do. Because, with a foundation built on partnership, anything is possible.
About the Role

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

As an Analog Layout Engineer with Marvell, you’ll be a member of the Central Engineering business group. If you picture Marvell as a wheel, Central Engineering is the center hub providing IP to be used by all the other spokes on that wheel, including Automotive, Storage, Security, and Networking. You’ll be part of a small analog team making a big impact on this organization. Additionally, Marvell has the perfect size and scale for you to learn several aspects of engineering that will be new to you, but also have the time and freedom to dive deep into the details of your specialization on most projects

What You Can Expect

1. Learning the use of all the different IC layout development CAD and physical verification tools

2. Training on Mask/layout design using Cadence Virtuoso EXL using circuit design as input

3. Responsible for layout development and delivery of Foundational IP and Analog layout for SOCs and Test chips

4. Work with a team and collaborate effectively with people for effective outcomes. 

5. An excellent opportunity to explore, collaborate, and connect theory to hands on experience

What We're Looking For

  • Candidate MUST be currently pursuing a BE/MTech (preferred) degree in CS/EE/EC/Microelectronics or related technical field(s) 
  • Excellent written and verbal Communication skills 
  • Should have good knowledge of CMOS process and fabrication 
  • Strong digital fundamentals: latches, flip-flops, and combinatorial logic 
  • Good understanding of circuit elements like Diode, Transistor, Capacitor, resistor 
  • Electrical network analysis using different theorems 
  • Basics of Scripting knowledge 
  • Basic knowledge of IC layout editor tools




Additional Compensation and Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Interview Integrity 

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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Key Skills
Analog layoutCadence Virtuoso EXLCMOS processFabricationDigital fundamentalsLatchesFlip-flopsCombinatorial logicCircuit elementsElectrical network analysisScriptingIC layout editor tools
Categories
EngineeringTechnologyManufacturing
Benefits
Competitive compensation