Job Details:

Job Description:

As an Embedded Soft IP intern in the Software, IP and Solutions (SIPS) group, you will work closely with the engineering team to design, verify and release RTL based IPs into Quartus as well as embedded reference designs. You will be exposed to industry practices and collaborate with a diverse team of hardware and software engineers working on Altera’s range of FPGA devices. From this experience, you will have a chance to build both wide and deep technical skills while contributing to designs used broadly across many industries.

We are looking for someone with the following qualities:

• Passion for learning, curious and has a growth mindset
• Able to work independently and effectively in a multi-site team environment
• Fluent communication skills
• Able to problem solve and debug systematically
• Goal oriented and able to complete assignments on time and with quality

You will:

• Contribute to process enhancements in both designing and validating existing and new IPs including scripting and implementing methodology improvements
• Write functional tests, debug and potentially root cause regression failures, and propose solutions
• Actively participate in team meetings, reviews and design discussions
• Comprehend functional requirements and specifications of various IPs and designs
• Execute and run design flows, regressions and participate in design implementation.

Qualifications:

• Pursuing a Bachelor’s or Master’s degree in Electrical, Computer or Electronics Engineering, Computer Science, or a comparable discipline
• Strong understanding of digital logic design and basic computer architecture
• Familiar with scripting languages (Python, Perl, or TCL)
• Familiar with System Verilog, Verilog, or VHDL
• Exposure to FPGA design flows or tools (Quartus, Vivado, etc.)

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